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Digitally intensive wireless transceiversStaszewski, Robert Bogdan · IEEE Design & Test of Computers · 2012
Test Challenges for 3D Integrated CircuitsLee, Hsien-Hsin; Chakrabarty, Krishnendu · IEEE Design & Test · 2013
Adaptive Alternate Analog TestStratigopoulos, Haralampos-G.; Mir, Salvador · IEEE Design & Test of Computers · 2012
The Olympus synthesis systemDe Micheli, G.; Ku, D.; Mailhot, F.; Truong, T. · IEEE Design & Test of Computers · 1990
Clock system designWagner, K.D. · IEEE Design & Test of Computers · 1988
Alpha 21164 testability strategyBhavsar, D.K.; Edmondson, J.H. · IEEE Design & Test of Computers · 1997
Automatic generation of parallel CRC circuitsSprachmann, M. · IEEE Design & Test of Computers · 2001
Automated BIST for sequential logic synthesisStroud, C.E. · IEEE Design & Test of Computers · 1988