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[IEEE Comput. Soc. Press 1994 IEEE International Conference on Computer Design: VLSI in Computers and Processors - Cambridge, MA, USA (10-12 Oct. 1994)] Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computers and Processors - A parallel CMOS 2's complement multiplier based on 5:3 counter

[IEEE Comput. Soc. Press 1994 IEEE International Conference on Computer Design: VLSI in Computers and Processors - Cambridge, MA, USA (10-12 Oct. 1994)] Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computers and Processors - A parallel CMOS 2's complement multiplier based on 5:3 counter

Guan, Z.; Thomson, P.; Almaini, A.E.A.

作者Guan, Z.; Thomson, P.; Almaini, A.E.A.
文件大小434.46KB
发表时间1994
DOI10.1109/iccd.1994.331910
页码298-301

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