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[IEEE Comput. Soc International Conference on Computer Design. VLSI in Computers and Processors - Austin, TX, USA (5-7 Oct. 1998)] Proceedings International Conference on Computer Design. VLSI in Computers and Processors (Cat. No.98CB36273) - A low-power logic optimization methodology based on a fast power-driven mapping

[IEEE Comput. Soc International Conference on Computer Design. VLSI in Computers and Processors - Austin, TX, USA (5-7 Oct. 1998)] Proceedings International Conference on Computer Design. VLSI in Computers and Processors (Cat. No.98CB36273) - A low-power logic optimization methodology based on a fast power-driven mapping

Roy, S.; Arts, H.; Banerjee, P.

作者Roy, S.; Arts, H.; Banerjee, P.
文件大小122.26KB
发表时间1998
DOI10.1109/iccd.1998.727039
页码175-181

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