发现好书期刊，享受阅读乐趣

海量图书期刊资源，随时随地畅享阅读乐趣

Integrated FPGA based ASIC design on error code correction counter for UPS telecommunication

Integrated FPGA based ASIC design on error code correction counter for UPS telecommunication

Jian-long Kuo; Chin-chin Tsai; L. Lai; T. Chen; T. Ding

作者Jian-long Kuo; Chin-chin Tsai; L. Lai; T. Chen; T. Ding
文件大小437.65KB
发表时间2001
DOI10.1109/PEDS.2001.975370

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