[IEEE 2002 Symposium on VLSI Circuits. Digest of Technical Papers - Honolulu, HI, USA (13-15 June 2002)] 2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302) - Design optimizations of a high performance microprocessor using combinations of dual-V/sub T/ allocation and transistor sizing
Tschanz, J.; Yibin Ye, ; Liqiong Wei, ; Govindarajulu, V.; Borkar, N.; Burns, S.; Karnik, T.; Borkar, S.; De, V.
- 作者Tschanz, J.; Yibin Ye, ; Liqiong Wei, ; Govindarajulu, V.; Borkar, N.; Burns, S.; Karnik, T.; Borkar, S.; De, V.
- 文件大小195.38KB
- 发表时间2002
- DOI10.1109/VLSIC.2002.1015089
- 页码218-219