[IEEE 2002 IEEE Bipolar/BICMOS Circuits and Technology Meeting - Minneapolis, MN, USA (2002.10.1-2002.10.1)] Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting BIPOL-02 - Proceedings of the 2002 Bipolar/BiCMOS Circuits and Technology Meeting (Cat. No.02CH37384)
- 文件大小304.32KB
- 发表时间2002
- DOI10.1109/BIPOL.2002.1042877
A Modular and Scalable Architecture for the Realization of High-speed Programmable Rank Order Filters Using Threshold LogicHatirnaz, İ.; Gürkaynak, F. K.; Leblebici, Y. · VLSI Design · 2000
[IEEE Research in Microelectronics and Electronics, 2005 PhD - Lausanne, Switzerland (July, 25, 2005)] Research in Microelectronics and Electronics, 2005 PhD - Semi-automated design of a MOS currentmode logic standard cell library from generic componentsBadel, S.; Hatirnaz, I.; Leblebici, Y. · 2005
[IEEE 2006 IEEE International Symposium on Circuits and Systems - Island of Kos, Greece (21-24 May 2006)] 2006 IEEE International Symposium on Circuits and Systems - Via-Programmable Expanded Universal Logic Gate in MCML for Structured ASIC Applications: Circuit DesignBrauer, E.J.; Hatirnaz, I.; Badel, S.; Leblebici, Y. · 2006
[IEEE 2000 International Conference on Acoustics, Speech and Signal Processing - Istanbul, Turkey (5-9 June 2000)] 2000 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings (Cat. No.00CH37100) - A compact modular architecture for high-speed binary sortingHatirnaz, I.; Gurkaynak, F.K.; Leblebici, Y. · 2000
[IEEE . 2003 International Symposium on System-on-Chip - Tampere, Finland (19-21 Nov. 2003)] Proceedings. 2003 International Symposium on System-on-Chip (IEEE Cat. No.03EX748) - Twisted differential on-chip interconnect architecture for inductive/capacitive crosstalk noise cancellationHatirnaz, I.; Leblebici, Y. · 2003
[IEEE 2004 IEEE International Symposium on Circuits and Systems - Vancouver, BC, Canada (23-26 May 2004)] 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512) - Modelling and implementation of twisted differential on-chip interconnects for crosstalk noise reductionHatirnaz, I.; Leblebici, Y. · 2004
[IEEE Twelfth Annual IEEE International ASIC/SOC Conference - Washington, DC, USA (15-18 Sept. 1999)] Twelfth Annual IEEE International ASIC/SOC Conference (Cat. No.99TH8454) - A modular and scalable architecture for the realization of high-speed programmable rank order filtersHatirnaz, I.; Gurkaynak, F.K.; Leblebici, Y. · 1999