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A comparison of various terminal-gate relationships for interconnect prediction in VLSI circuits

A comparison of various terminal-gate relationships for interconnect prediction in VLSI circuits

Dambre, J.; Verplaetse, P.; Stroobandt, D.; Van Campenhout, J.

期刊名称IEEE Transactions on Very Large Scale Integration (VLSI) Systems
作者Dambre, J.; Verplaetse, P.; Stroobandt, D.; Van Campenhout, J.
卷第11卷
期第1期
印刷ISSN1063-8210
电子ISSN1557-9999
文件大小615.42KB
发表时间2003-02
DOI10.1109/tvlsi.2002.808454
页码24-34

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