[IEEE Digest of Technical Papers. 2005 Symposium on VLSI Circuits, 2005. - Kyoto, Japan (June 16-18, 2005)] Digest of Technical Papers. 2005 Symposium on VLSI Circuits, 2005. - A low leakage SRAM macro with replica cell biasing scheme
- 作者Takeyama, Y.; Otake, H.; Hirabayashi, O.; Kushida, K.; Otsuka, N.
- 文件大小554.00KB
- 发表时间2005
- DOI10.1109/vlsic.2005.1469357
- 页码166-167
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