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Scalable architecture for word HMM-based speech recognition and VLSI implementation in complete system

Scalable architecture for word HMM-based speech recognition and VLSI implementation in complete system

Yoshizawa, S.; Wada, N.; Hayasaka, N.; Miyanaga, Y.

作者Yoshizawa, S.; Wada, N.; Hayasaka, N.; Miyanaga, Y.
卷第53卷
期第1期
印刷ISSN1549-8328
文件大小599.24KB
发表时间2006
DOI10.1109/tcsi.2005.854408
页码70-77

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