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A 2.5- to 3.5-Gb/s Adaptive FIR Equalizer With Continuous-Time Wide-Bandwidth Delay Line in 0.25- CMOS

A 2.5- to 3.5-Gb/s Adaptive FIR Equalizer With Continuous-Time Wide-Bandwidth Delay Line in 0.25- CMOS

Xiaofeng Lin; Jin Liu; Hoi Lee; Hao Liu

作者Xiaofeng Lin; Jin Liu; Hoi Lee; Hao Liu
卷第41卷
期第8期
印刷ISSN0018-9200
电子ISSN1558-173X
文件大小2240.84KB
发表时间2006
DOI10.1109/jssc.2006.875302

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