[IEEE 2006 IEEE Workshop on Signal Processing Systems Design and Implementation - Banff, AB, Canada (2006.10.2-2006.10.4)] 2006 IEEE Workshop on Signal Processing Systems Design and Implementation - Partly Parallel Overlapped Sum-Product Decoder Architectures for Quasi-Cyclic LDPC Codes
Chen, Ning; Dai, Yongmei; Yan, Zhiyuan
- 作者Chen, Ning; Dai, Yongmei; Yan, Zhiyuan
- 文件大小7999.74KB
- 发表时间2006
- DOI10.1109/sips.2006.352585
- 页码220-225