[IEEE 2006 IEEE International High Level Design Validation and Test Workshop - Monterey, CA, USA (2006.11.8-2006.11.10)] 2006 IEEE International High Level Design Validation and Test Workshop - Efficient Automata-Based Assertion-Checker Synthesis of PSL Properties
Boule, Marc; Zilic, Zeljko
- 作者Boule, Marc; Zilic, Zeljko
- 文件大小10096.75KB
- 发表时间2006
- DOI10.1109/hldvt.2006.319966
- 页码69-76