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[IEEE 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06) - Hyderabad, India (2006.01.3-2006.01.7)] 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06) - A rail-to-rail I/O operational amplifier with 0.5% g/sub m/ fluctuation using double p-channel differential input pairs

[IEEE 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06) - Hyderabad, India (2006.01.3-2006.01.7)] 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06) - A rail-to-rail I/O operational amplifier with 0.5% g/sub m/ fluctuation using double p-channel differential input pairs

Zhiyuan Li, ; Mingyan Yu, ; Jianguo Ma,
  • 作者Zhiyuan Li, ; Mingyan Yu, ; Jianguo Ma,
  • 文件大小256.19KB
  • 发表时间2006
  • DOI10.1109/vlsid.2006.23
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