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[IEEE 2007 International Conference on Design & Technology of Integrated Systems in Nanoscale Era - Rabat, Morocco (2007.09.2-2007.09.5)] 2007 International Conference on Design & Technology of Integrated Systems in Nanoscale Era - Minimization of functional tests by statistical modelling of analogue circuits

[IEEE 2007 International Conference on Design & Technology of Integrated Systems in Nanoscale Era - Rabat, Morocco (2007.09.2-2007.09.5)] 2007 International Conference on Design & Technology of Integrated Systems in Nanoscale Era - Minimization of functional tests by statistical modelling of analogue circuits

Akkouche, Nourredine; Bounceur, Ahcene; Mir, Salvador; Simeu, Emmanuel
  • 作者Akkouche, Nourredine; Bounceur, Ahcene; Mir, Salvador; Simeu, Emmanuel
  • 文件大小419.01KB
  • 发表时间2007
  • DOI10.1109/dtis.2007.4449488
  • 页码35-40
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