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[IEEE 2007 IEEE Electrical Performance of Electronic Packaging - Atlanta, GA, USA (2007.10.29-2007.10.31)] 2007 IEEE Electrical Performance of Electronic Packaging - Chip Power Model - A New Methodology for System Power Integrity Analysis and Design

[IEEE 2007 IEEE Electrical Performance of Electronic Packaging - Atlanta, GA, USA (2007.10.29-2007.10.31)] 2007 IEEE Electrical Performance of Electronic Packaging - Chip Power Model - A New Methodology for System Power Integrity Analysis and Design

Kulali, Emre; Wasserman, Evgeny; Zheng, Ji

作者Kulali, Emre; Wasserman, Evgeny; Zheng, Ji
文件大小1057.96KB
发表时间2007
DOI10.1109/epep.2007.4387176
页码259-262

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