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New Techniques for Improving the Performance of the Lockstep Architecture for SEEs Mitigation in FPGA Embedded Processors

New Techniques for Improving the Performance of the Lockstep Architecture for SEEs Mitigation in FPGA Embedded Processors

Abate, F.; Sterpone, L.; Lisboa, C. A.; Carro, L.; Violante, M.
  • 期刊名称IEEE Transactions on Nuclear Science
  • 作者Abate, F.; Sterpone, L.; Lisboa, C. A.; Carro, L.; Violante, M.
  • 卷第56卷
  • 期第4期
  • 印刷ISSN0018-9499
  • 文件大小169.78KB
  • 发表时间2009-08
  • DOI10.1109/tns.2009.2013237
  • 页码1992-2000
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