[IEEE 2009 IEEE 8th International Conference on ASIC (ASICON) - Changsha, Hunan, China (2009.10.20-2009.10.23)] 2009 IEEE 8th International Conference on ASIC - Full coverage location of logic resource faults in A SOC co-verification technology based FPGA functional test environment
Liao, Y.B.; Li, P.; Ruan, A.W.; Li, W.; Li, W.C.
- 作者Liao, Y.B.; Li, P.; Ruan, A.W.; Li, W.; Li, W.C.
- 文件大小7834.37KB
- 发表时间2009
- DOI10.1109/asicon.2009.5351202
- 页码1228-1231