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Nonvolatile Power-Gating FPGA Based on Pseudo-Spin-Transistor Architecture with Spin-Transfer-Torque MTJs

Nonvolatile Power-Gating FPGA Based on Pseudo-Spin-Transistor Architecture with Spin-Transfer-Torque MTJs

Yamamoto, Shuu’ichirou; Shuto, Yusuke; Sugahara, Satoshi

期刊名称MRS Proceedings
作者Yamamoto, Shuu’ichirou; Shuto, Yusuke; Sugahara, Satoshi
卷第1430卷
电子ISSN1946-4274
文件大小516.53KB
发表时间2012-1
DOI10.1557/opl.2012.1183

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