![A 28-nm CMOS 7-GS/s 6-bit DAC With DfT Clock and Memory Reaching SFDR <formula><tex>(textbf {>}textbf{50})</tex></formula> dB Up to 1 GHz]()
A 28-nm CMOS 7-GS/s 6-bit DAC With DfT Clock and Memory Reaching SFDR <formula><tex>(textbf {>}textbf{50})</tex></formula> dB Up to 1 GHzRadulov, Georgi I.; Quinn, Patrick J.; van Roermund, Arthur H. M. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2014