[IEEE 2012 13th International Symposium on Quality Electronic Design (ISQED) - Santa Clara, CA, USA (2012.03.19-2012.03.21)] Thirteenth International Symposium on Quality Electronic Design (ISQED) - 24% Power reduction by post-fabrication dual supply voltage control of 64 voltage domains in V<inf>DDmin</inf> limited ultra low voltage logic circuitsYasufuku, Tadashi; Hirairi, Koji; Pu, Yu; Zheng, Yun Fei; Takahashi, Ryo; Sasaki, Masato; Fuketa, Hiroshi; Muramatsu, Atsushi; Nomura, Masahiro; Shinohara, Hirofumi; Takamiya, Makoto; Sakurai, Takayasu · 2012

[IEEE 2012 IEEE International Solid- State Circuits Conference - (ISSCC) - San Francisco, CA, USA (2012.02.19-2012.02.23)] 2012 IEEE International Solid-State Circuits Conference - 13% Power reduction in 16b integer unit in 40nm CMOS by adaptive power supply voltage control with parity-based error prediction and detection (PEPD) and fully integrated digital LDOHirairi, Koji; Okuma, Yasuyuki; Fuketa, Hiroshi; Yasufuku, Tadashi; Takamiya, Makoto; Nomura, Masahiro; Shinohara, Hirofumi; Sakurai, Takayasu · 2012

[IEEE 2011 International Symposium on Low Power Electronics and Design (ISLPED) - Fukuoka, Japan (2011.08.1-2011.08.3)] IEEE/ACM International Symposium on Low Power Electronics and Design - 12.7-times energy efficiency increase of 16-bit integer unit by power supply voltage (V<inf>DD</inf>) scaling from 1.2V to 310mV enabled by contention-less flip-flops (CLFF) and separated V<inf>DD</inf> between flip-flops and combinational logicsFuketa, Hiroshi; Hirairi, Koji; Yasufuku, Tadashi; Takamiya, Makoto; Nomura, Masahiro; Shinohara, Hirofumi; Sakurai, Takayasu · 2011

mwJFS: A Multiwrite-Mode Journaling File System for MLC NVRAM StoragesChen, Shuo-Han; Chang, Yuan-Hao; Chang, Yu-Ming; Shih, Wei-Kuan · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2019