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[IEEE 2016 International Conference on Circuit, Power and Computing Technologies (ICCPCT) - Nagercoil, India (2016.3.18-2016.3.19)] 2016 International Conference on Circuit, Power and Computing Technologies (ICCPCT) - High speed low-power true single-phase clock divide-by-16/17 dual-modulus prescaler using 130nm CMOS process with a Vdd of 1.2V

[IEEE 2016 International Conference on Circuit, Power and Computing Technologies (ICCPCT) - Nagercoil, India (2016.3.18-2016.3.19)] 2016 International Conference on Circuit, Power and Computing Technologies (ICCPCT) - High speed low-power true single-phase clock divide-by-16/17 dual-modulus prescaler using 130nm CMOS process with a Vdd of 1.2V

Hemapradhap, N; Ajayan, J
  • 作者Hemapradhap, N; Ajayan, J
  • 文件大小360.79KB
  • 发表时间2016
  • DOI10.1109/ICCPCT.2016.7530107
  • 页码1-6
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