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[IEEE 2017 30th International Conference on VLSI Design and 2017 16th International Conference on Embedded Systems (VLSID) - Hyderabad, India (2017.1.7-2017.1.11)] 2017 30th International Conference on VLSI Design and 2017 16th International Conference on Embedded Systems (VLSID) - Improved Path Recovery in Pseudo Functional Path Delay Test Using Extended Value Algebra

[IEEE 2017 30th International Conference on VLSI Design and 2017 16th International Conference on Embedded Systems (VLSID) - Hyderabad, India (2017.1.7-2017.1.11)] 2017 30th International Conference on VLSI Design and 2017 16th International Conference on Embedded Systems (VLSID) - Improved Path Recovery in Pseudo Functional Path Delay Test Using Extended Value Algebra

Biswas, Prasenjit; Walker, D. M. H.
  • 作者Biswas, Prasenjit; Walker, D. M. H.
  • 文件大小722.60KB
  • 发表时间2017
  • DOI10.1109/VLSID.2017.63
  • 页码141-146
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