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[IEEE 2017 IEEE 12th International Conference on ASIC (ASICON) - Guiyang (2017.10.25-2017.10.28)] 2017 IEEE 12th International Conference on ASIC (ASICON) - A 55nm logic process compatible p-flash memory array fully demonstrated with high reliability

[IEEE 2017 IEEE 12th International Conference on ASIC (ASICON) - Guiyang (2017.10.25-2017.10.28)] 2017 IEEE 12th International Conference on ASIC (ASICON) - A 55nm logic process compatible p-flash memory array fully demonstrated with high reliability

Han, Jinghui; Zhou, Yao; Ni, Hao; Zheng, Xiao; Zhao, Yi

作者Han, Jinghui; Zhou, Yao; Ni, Hao; Zheng, Xiao; Zhao, Yi
文件大小673.79KB
发表时间2017
DOI10.1109/ASICON.2017.8252505
页码429-432

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