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[IEEE 2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS) - Dallas, TX, USA (2019.8.4-2019.8.7)] 2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS) - All-Digital ∆Σ TDC with Current-Starved Bi-Directional Gated Delay Line Time Integrator

[IEEE 2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS) - Dallas, TX, USA (2019.8.4-2019.8.7)] 2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS) - All-Digital ∆Σ TDC with Current-Starved Bi-Directional Gated Delay Line Time Integrator

Yuan, Fei; Parekh, Parth
  • 作者Yuan, Fei; Parekh, Parth
  • 文件大小3228.32KB
  • 发表时间2019
  • DOI10.1109/MWSCAS.2019.8885185
  • 页码493-496
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