![[IEEE 2012 International Symposium on Electronic System Design (ISED) - Kolkata, India (2012.12.19-2012.12.22)] 2012 International Symposium on Electronic System Design (ISED) - Design and Analysis of a Robust, High Speed, Energy Efficient 18 Transistor 1-bit Full Adder Cell, Modified with the Concept of MVT Scheme]()
[IEEE 2012 International Symposium on Electronic System Design (ISED) - Kolkata, India (2012.12.19-2012.12.22)] 2012 International Symposium on Electronic System Design (ISED) - Design and Analysis of a Robust, High Speed, Energy Efficient 18 Transistor 1-bit Full Adder Cell, Modified with the Concept of MVT SchemeBasak, Subhramita; Saha, Dipankar; Mukherjee, Sagar; Chatterjee, Sayan; Sarkar, C.K. · 2012