[IEEE Comput. Soc Design, Automation and Test in Europe. Conference and Exhibition 2001 - Munich, Germany (13-16 March 2001)] Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001 - Circuit partitioning for efficient logic BIST synthesisIrion, A.; Kiefer, G.; Vranken, H.; Wunderlich, H.-J. · 2001

[IEEE IEEE Custom Integrated Circuits Conference - Boston, MA, USA (13-16 May 1990)] IEEE Proceedings of the Custom Integrated Circuits Conference - Circuit partitioning and resynthesisDey, S.; Brglez, F.; Kedem, G. · 1990

[IEEE Comput. Soc. Press IEEE International Conference on Computer Design: VLSI in Computers and Processors - Cambridge, MA, USA (14-16 Oct. 1991)] [1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors - Partitioning sequential circuits for logic optimizationDey, S.; Brglez, F.; Kedem, G. · 1991