![[IEEE 2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC) - Singapore (2014.01.20-2014.01.23)] 2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC) - A dual-loop injection-locked PLL with all-digital background calibration system for on-chip clock generation]()
[IEEE 2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC) - Singapore (2014.01.20-2014.01.23)] 2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC) - A dual-loop injection-locked PLL with all-digital background calibration system for on-chip clock generationDeng, Wei; Musa, Ahmed; Siriburanon, Teerachot; Miyahara, Masaya; Okada, Kenichi; Matsuzawa, Akira · 2014