[ACM Press the 34th ACM SIGPLAN conference - Seattle, Washington, USA (2013.06.16-2013.06.19)] Proceedings of the 34th ACM SIGPLAN conference on Programming language design and implementation - PLDI '13 - Fast RMWs for TSORajaram, Bharghava; Nagarajan, Vijay; Sarkar, Susmit; Elver, Marco · 2013

[IEEE 2017 Formal Methods in Computer-Aided Design (FMCAD) - Vienna (2017.10.2-2017.10.6)] 2017 Formal Methods in Computer Aided Design (FMCAD) - Verification of a lazy cache coherence protocol against a weak memory modelBanks, Christopher J.; Elver, Marco; Hoffmann, Ruth; Sarkar, Susmit; Jackson, Paul; Nagarajan, Vijay · 2017

[IEEE 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE) - Dresden, Germany (2018.3.19-2018.3.23)] 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE) - VerC3: A library for explicit state synthesis of concurrent systemsElver, Marco; Banks, Christopher J.; Jackson, Paul; Nagarajan, Vijay · 2018

[IEEE 2015 International Conference on Parallel Architecture and Compilation (PACT) - San Francisco, CA, USA (2015.10.18-2015.10.21)] 2015 International Conference on Parallel Architecture and Compilation (PACT) - RC3: Consistency Directed Cache Coherence for x86-64 with RC ExtensionsElver, Marco; Nagarajan, Vijay · 2015

[IEEE 2014 IEEE 20th International Symposium on High Performance Computer Architecture (HPCA) - Orlando, FL, USA (2014.2.15-2014.2.19)] 2014 IEEE 20th International Symposium on High Performance Computer Architecture (HPCA) - TSO-CC: Consistency directed cache coherence for TSOElver, Marco; Nagarajan, Vijay · 2014

[IEEE 2016 49th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO) - Taipei, Taiwan (2016.10.15-2016.10.19)] 2016 49th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO) - C ³ D: Mitigating the NUMA bottleneck via coherent DRAM cachesHuang, Cheng-Chieh; Kumar, Rakesh; Elver, Marco; Grot, Boris; Nagarajan, Vijay · 2016