Nonvolatile flip-flop based on pseudo-spin-transistor architecture and its nonvolatile power-gating applications for low-power CMOS logic
- 期刊名称The European Physical Journal Applied Physics
- 作者Yamamoto, Shuu’ichirou; Shuto, Yusuke; Sugahara, Satoshi
- 卷第63卷
- 期第1期
- 印刷ISSN1286-0042
- 电子ISSN1286-0050
- 文件大小1024.49KB
- 发表时间2013-07
- DOI10.1051/epjap/2013120486
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