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[IEEE 2014 IEEE International Symposium on Circuits and Systems (ISCAS) - Melbourne VIC, Australia (2014.6.1-2014.6.5)] 2014 IEEE International Symposium on Circuits and Systems (ISCAS) - An area- and power-efficient FIFO with error-reduced data compression for image/video processing

[IEEE 2014 IEEE International Symposium on Circuits and Systems (ISCAS) - Melbourne VIC, Australia (2014.6.1-2014.6.5)] 2014 IEEE International Symposium on Circuits and Systems (ISCAS) - An area- and power-efficient FIFO with error-reduced data compression for image/video processing

Zeinolabedin, Seyed Mohammad Ali; Zhou, Jun; Liu, Xin; Kim, Tony T.

作者Zeinolabedin, Seyed Mohammad Ali; Zhou, Jun; Liu, Xin; Kim, Tony T.
文件大小551.10KB
发表时间2014
DOI10.1109/iscas.2014.6865625
页码2277-2280

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